Lithography steps for transferring a circuit pattern onto a silicon substrate include a film forming step of applying a photosensitive material onto a silicon substrate and drying it, a step of overlaying a photomask on an overlaid region based on a positioning mark, a step of exposing the photosensitive film by irradiating light, an electron beam or X-rays through the photomask onto the photosensitive film, and a step of removing the photosensitive material at the portions where it is not needed after the exposure, thus forming a pattern of photosensitive material on the silicon substrate. Thus, a step of overlaying a photomask is performed when forming a semiconductor device.
FIGS. 11A to 11D are cross-sectional views illustrating a conventional method for manufacturing a semiconductor device. As shown in FIG. 11A, a photosensitive pattern 93 with an aperture at a portion corresponding to a positioning mark region 8 for the photomask is formed on a semiconductor substrate 6.
As shown in FIG. 11B, in order to form the positioning mark for the photomask, the semiconductor substrate 6 in the positioning mark region 8 is etched at the aperture in the photosensitive pattern 93, thus forming a level difference 11.
Then, after removing the photosensitive pattern 93 by washing or the like, a photosensitive pattern 92 having an aperture at an impurity introduction region 7 is formed covering the level difference 11 formed at the positioning mark region 8, as shown in FIG. 11C. The overlaying of the photomask for forming the photosensitive pattern 92 is carried out with reference to the positioning mark formed by the above-noted photosensitive pattern 93. Then, impurities 12 are introduced by ion implantation or the like into the impurity introduction region 7 of the semiconductor substrate 6 through the aperture of the photosensitive pattern 92.
As shown in FIG. 11D, the photosensitive pattern 92 is removed by washing or the like, thus obtaining the impurity introduction region 7 into which impurities 12 have been introduced and the positioning mark region 8 in which the level difference 11 for the positioning mark is formed.
However, in this conventional method for manufacturing a semiconductor device as shown in FIGS. 11A–11D, in addition to forming the photosensitive pattern 92 for introducing impurities 12 into the impurity introduction region 7, it is necessary to form a separate photosensitive pattern 93 for forming the level difference 11 of the positioning mark for the photomask. Therefore, there is the problem that the number of manufacturing steps increases.
Moreover, photomasks forming other impurity introduction regions for introducing other impurities and gate electrodes are positioned with reference to the level difference 11 of the positioning mark formed by the photosensitive pattern 93, so that there is a risk of misalignments to the impurity introduction region 7 formed by the photosensitive pattern 92, which is different from the photosensitive pattern 93. Therefore, there is the problem that the characteristics of the semiconductor device may deteriorate.
In order to solve this problem, JP H08-107064A discloses a method for forming an impurity introduction region and a level difference for a positioning mark using the same photosensitive material. FIGS. 12A to 12D are cross-sectional views illustrating this other conventional method for manufacturing a semiconductor device.
As shown in FIG. 12A, a photosensitive pattern 83 having apertures at a portion corresponding to the positioning mark region 8 for the photomask and at a portion corresponding to an impurity introduction region 7 is formed on the semiconductor substrate 6. Then, as shown in FIG. 12B, the semiconductor substrate 6 is etched in the positioning mark region 8 and the impurity introduction region 7 at the apertures in the photosensitive pattern 83, forming a level difference 11 and a level difference 81.
Next, as shown in FIG. 12C, impurities 12 are introduced by ion implantation or the like through the apertures in the photosensitive pattern 83 into the impurity introduction region 7 and the positioning mark region 8 in the semiconductor substrate 6.
After that, as shown in FIG. 12D, the photosensitive pattern 83 is removed by washing or the like, obtaining the impurity introduction region 7 into which impurities 12 have been introduced and the positioning mark region 8 in which the level difference 11 for the positioning mark is formed.
However, with this method, the semiconductor substrate 6 is also etched in the impurity introduction region 7, so that crystal defects in the semiconductor substrate 6 result due to the plasma damage when etching. For this reason, there is the problem that the characteristics of the semiconductor device may deteriorate due to leak currents.
Moreover, since the impurities 12 are ion implanted directly after dry etching without performing a washing step, the ions are implanted from above the particles that are formed during the etching. This leads to crystal defects in the semiconductor substrate 6. As a result, there is the problem that the characteristics of the semiconductor device may deteriorate due to leak currents.
Furthermore, the reaction products formed during the etching act as a mask during the ion implantation, so that there is the risk that the desired concentration is not attained in the formed impurity region.
In order to solve these problems, JP H11-40495A discloses a method of forming a photosensitive pattern on a silicon substrate, lowering the photosensitivity of the formed photosensitive pattern by a heating process, introducing impurities to apertures in a predetermined region formed by the photosensitive pattern, forming another photosensitive pattern with apertures that are larger than the apertures in the first photosensitive pattern, and forming the positioning mark by etching.
FIGS. 13A to 13D, 14A and 14B are cross-sectional views illustrating yet another conventional method for manufacturing a semiconductor device.
As shown in FIG. 13A, a photosensitive pattern 83 with apertures at a portion corresponding to a positioning mark region 8 for the photomask and an impurity region 7 is formed on a semiconductor substrate 6.
Then, as shown in FIG. 13B, impurities 12 are introduced by ion implantation or the like through the apertures of the photosensitive pattern 83 into the impurity region 7 and the positioning mark region 8 in the semiconductor substrate 6.
Next, as shown in FIG. 13C, the photosensitive pattern 83 is subjected to a heating process, in order to lower the photosensitivity of the photosensitive pattern 83. After that, as shown in FIG. 13D, a photosensitive pattern 84 with an aperture in the positioning mark region 8 that is larger than the aperture of the photosensitive pattern 83 is formed on the photosensitive pattern 83, covering the impurity introduction region 7.
Then, as shown in FIG. 14A, the semiconductor substrate 6 is etched at the aperture of the photosensitive pattern 83 in the positioning mark region 8, forming a level difference 11 for the positioning mark. Next, as shown in FIG. 14B, the photosensitive pattern 84 and the photosensitive pattern 83 are removed by washing or the like, thus obtaining the impurity introduction region 7 into which impurities 12 have been introduced and the positioning mark region 8 in which the level difference 11 for the positioning mark is formed.
However, with this method, when there are pattern defects such as misalignments or deviations from the specifications of the dimensions, then it is not possible to remove only the photosensitive pattern 84 by washing or the like, so that there is the problem that pattern reproduction is not possible.
Moreover, when a photosensitive pattern 84 made of the same material as the photosensitive pattern 83 is applied on top of the photosensitive pattern 83, there is problem that the photosensitive pattern 84 may be destroyed as a result of mixing between the photosensitive pattern 83 and the photosensitive pattern 84.
It is an object of the present invention to provide a method for manufacturing a semiconductor device, with which an impurity introduction region and a positioning mark region that are aligned with one another can be formed, based on a common insulating film pattern and without inviting deterioration of the semiconductor device characteristics.